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Message and Parameter Set. The BICC message set and parameter set are virtually the same as for ISUP (Section 11.2): there are no additional message types or parameters and a few ISUP message types and parameters are not used (all those in the tables of Section 11.2 are in BICC). The slightly smaller message and parameter set is a consequence of messages and parameters related to bearer setup not being needed and their function being replaced by bearer-control protocols. One signi cant difference is that the CIC parameter, while retained by BICC, has a different name and function. In BICC signaling, CIC is called Call Instance code and identi es the instance of the signaling connection rather than the voice circuit. Also, the CIC in the BICC Call-Control Signaling Protocol is four octets long, compared to 12 bits for the ISUP CIC, thus increasing the capacity of the protocol. Binding Information. This is used to relate a call-control instance to the corresponding bearer connection. The information elements that relate signaling to bearer are:

The next top-level menu selection is the Places menu, shown in Figure 4-3.

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gate has the same physics as the dual-gate SOI transistor, but it is not an SOI device One of the first publication on the dual-gate transistor concept dates back to 198459 It shows that one can obtain significant reduction of short-channel effects in a device, called XMOS, in which an excellent control of the potential in the silicon film is achieved by using a top-and-bottom gate The name of the device comes from its resemblance with the Greek letter -EUsing this configuration, better control of the channel depletion region is obtained than in a "regular" SO1 MOSFET, and, in particular, the influence of the source and drain depletion regions are kept minimal This reduces the short-channel effects by screening the source and drain field lines away from the channel More complete modeling, including Monte Carlo simulations, is presented in Ref.

60, in which the ultimate scaling of silicon MOSFETs is explored According to that paper, the ultimate silicon device is a dualgate SO1 MOSFET with a gate length o f 30 nm, an oxide thickness of 3 nm, and a silicon film thickness of 5-20 nm Such a (simulated) device shows no short-channel effects for gate lengths larger than 70 nn, and provides transconductance values of up to 2300 mS/mm One problem with such thin devices is the splitting of the conduction band into subbands The energy minimum of the first subband controls the threshold voltage and is dependent on the silicon film thickness, according to the equation: 2 cyvT = (h2 1T/qm*t i)asi, where CaVT is the threshold uncertainty and Usi, is the silicon film thickness uncertainty The latter result is similar to the quantum61 mechanical increase of threshold voltage in ultrathin SO devices.

Fully depleted SOI MOSFETs are kncwn to have a near-ideal subthreshold slope For a slope factor of 105, a subthreshold slope of 63 mV/decade is indeed expected, but the presence of interface states brings it up to values around 66-68 mV/decade In dual-gate SOI MOSFETs, values vety close to the theoretical limit of 60 mV/ decade are expected Furthermore, this low value can be obtained for very short channel lengths provided the gate oxide thickness and the silicon film thickness are scaled accordingly Theoretical investigation shows a subthreshold slope with values lower than 63 mV/decade can be obtained for a gate length down to 01 gm if the device is designed using a scaling parameter v = L/2k, where L is the gate length, and X, called the "natural length," is equal to k sit~ito 1 4(oxtsi 520).